例句與造句

1. A closed unidirectional signal path connecting input / output devices to a system
   連接輸入輸出設(shè)備到系統(tǒng)的一種單向封閉的信號通路。
2. Superb electrical and environmental characteristics ideal for use in applications of signal path in audio mod and rc networks
   絕佳的電氣與環(huán)境溫度特性,電容誤差值, 10 %
3. We earlier considered the benefits of outward and return signal paths being close together so that inductance is minimized
   前文曾經(jīng)提到，讓信號的輸出線和返回線靠近可以降低傳輸電抗。
4. The message follows along the specified signaling path beginning at the origination point and ending at the destination point
   消息會沿著從始發(fā)點開始、到終止點結(jié)束的、指定的信令路徑進行傳輸。
5. With instruments and duts both connected to columns , two crosspoints must be closed for each signal path , increasing the safety factor
   儀器和dut均被連接到列，每條信號通路中必須有兩個交叉點閉合，提高了安全系數(shù)。
6. It's difficult to find signal path in a sentence. 用signal path造句挺難的
7. Check everywhere with an oscilloscope probe , and use your multimeter to confirm that signal paths are connected properly
   這是因為你需要用示波器測試每一個地方，并通過萬用表測量各個地方來確認所有的信號通道被完好的連接著。
8. The non - blocking matrix of figure 1 - 15 allows simultaneous connection of multiple input / output signal paths , up to the full number of matrix inputs , if desired
   圖1 - 15中的非分塊矩陣可以同時連接多個輸入/輸出信號路徑，最多可達到矩陣輸入的最大數(shù)量。
9. 3 . a rf pa linearziation system that combines rf predistorting technique and feedforward technique is present . contrasted with basic feedforward system , the main improvement of new system is the signal feature of error signal path
   由于在主功放和誤差功放前分別加上了射頻預(yù)失真單元，因此提高了整個系統(tǒng)的線性度和功率效率。
10. As to the software , we firstly scheduled all of the test signal path between the computer and the uut , the output control logic between the digital i / o card and programmable relay key matrix , and used all of this to be the base of software design , then we introduce the block flow of software
    在軟件設(shè)計部分首先規(guī)劃了所有測試信號在計算機主機與被測件之間的連接和傳輸路徑、數(shù)字i / o卡對可編程繼電器開關(guān)矩陣的輸出控制邏輯，作為軟件設(shè)計依據(jù)，隨后介紹了軟件的模塊化設(shè)計思想。
11. The vxibus c - size and i , q channels are employed in this module design , and the sampling rate in each channel reaches 500mhz . the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ) . the timing and logic function are fulfilled by fpga . after the disscusion of signal adjusted , the detailed scheme of this module design have been showed . in this design , there is much logic function design , and it is very strict with the hardware language program . so the basic flow of hardware program design and several very important methods of high speed logic function design , which is described by vhdl , are introduced . also , expatiated the inner modules structure of fpga for forepart circuit , the keystone and difficulties of the design . the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system , and it is very important . the timing simulating results of several pivotal modules are depicted . high - speed signal paths are terminated to match the characteristic impedance . the design undergoes integrity analysis and software simulation
    在本模塊的設(shè)計中,有著大量的邏輯設(shè)計,對硬件語言程序的編寫要求比較高,因此,文中介紹了硬件程序設(shè)計的基本流程,以及幾種基于vhdl硬件語言設(shè)計在高速邏輯設(shè)計中非常重要的方法。同時闡述了本模塊設(shè)計的前端fpga的內(nèi)部模塊結(jié)構(gòu),設(shè)計的重點、難點,并給出了重要模塊的時序仿真結(jié)果。高速pcb的設(shè)計也是目前實現(xiàn)高速數(shù)據(jù)采集系統(tǒng)的難點和重點,文中詳細的闡明了高速pcb設(shè)計中的注意點,以及作者在設(shè)計本模塊時的經(jīng)驗和心得。